6973 – CoreEP4CE10/en
Erscheinungsbild
Documentation notice: This technical documentation was independently rewritten from an archived supplier source. Check technical details and commands against the product version and manufacturer documentation before use.
Summary
Technical guide for the Waveshare CoreEP4CE10: an FPGA core board featuring the onboard ALTERA Cyclone IV EP4CE10F17C8N chip.
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Technical overview
- The board is a Waveshare FPGA core board.
- It features the ALTERA Cyclone IV chip, model EP4CE10F17C8N.
- Available resources include the user manual, demo code (Verilog, VHDL, NIOS), pin configuration, and schematic.
- Software and datasheets are also provided.
- The FAQ explains how to set up Quartus to generate a POF file: under Assignments → Device → Device and Pin Options and Configuration Options, select the target configuration device and choose the “Active Serial” scheme.
- A common error with newly purchased boards often stems from using an unsupported Quartus version; the source states that switching to Quartus 11 resolves it.
- When assigning pins in Quartus II, the message “can't place multiple pins assigned to pin location Pin_101” can appear; the source indicates this should be avoided by ensuring unique pin assignments.
Notes and version constraints
- The exact supported Quartus version is only stated as “Quartus 11”; compatibility with other versions must be verified separately.
- A reference to an external URL (51hei.com) was removed; resolving the pin-assignment issue requires human confirmation.
- No information on power supply, clock frequency, or warranty is present in the source document.
Source and revision record
- CoreEP4CE10 - Waveshare Wiki
- Source revision: 106118
- Captured: 2026-08-29T09:06:08+00:00
- SHA-256:
dadeeaa9020ebcdb95785b94ef894bafa4f337249024b11f83f9abfde1e4c2fe